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Current Mirror Output Calculator

Calculate the ideal output current of a current mirror from the reference current and the output-to-reference device size ratio

Frequently Asked Questions

How does a current mirror set the output current?

In an ideal mirror the output current equals the reference current scaled by the ratio of the output device size to the reference device size. A ratio of one copies the current exactly, while larger ratios multiply it.

Why is the real output current never exactly ideal?

A real mirror assumes perfectly matched devices at the same temperature and ignores channel-length modulation in MOSFETs and finite base current in bipolar transistors. These effects make the true output drift slightly with output voltage and mismatch.

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How This Calculator Works

A current mirror copies a reference current into one or more output branches. In an ideal mirror the output current equals the reference current multiplied by the ratio of the output device size to the reference device size. Making the output transistor wider, or placing several in parallel, scales the mirrored current up, while a smaller output device scales it down.

How To Use It

Enter the reference current that flows in the input leg, then the ratio of output device size to reference device size. A ratio of 1 produces an output current equal to the reference. A ratio of 2 doubles it, and a ratio of 0.5 halves it. The result is the ideal mirrored output current.

Real World Limits

The ideal mirror assumes the two devices are perfectly matched and at the same temperature. In practice the output current drifts with the output voltage because of channel-length modulation in MOSFETs, and bipolar mirrors lose a little accuracy to base-current error. Cascode and Wilson mirror topologies reduce these effects.

Tips

Keep both transistors close together for good matching.
Use cascoding when high output resistance matters.
Watch device matching, layout, and temperature for precision.

Current Mirror Topologies

Several circuit topologies have evolved to improve upon the simple two-transistor mirror, each trading complexity for better accuracy or higher output impedance.

Basic BJT mirror (simple): Two matched NPN transistors with emitters grounded, bases tied together, and the collector of Q1 also connected to its base through a diode-connect. Simple and compact, but Vce mismatch between the reference leg and the output leg causes a systematic current error because transistor current depends slightly on collector-emitter voltage through the Early effect.

Wilson mirror: An added third transistor in the feedback path boosts the output impedance by roughly 100x compared to the simple mirror. The Wilson topology corrects for base-current errors and makes the output current much less sensitive to output voltage variation. It is the go-to choice when better accuracy is needed without the complexity of a cascode.

Widlar mirror: Uses unequal emitter resistors between the two transistors. Because the Vbe of the output transistor is lowered by a degeneration resistor, the output current can be set to a very small fraction of the reference current without needing an impractically small device ratio. This makes the Widlar mirror the standard approach for generating low reference currents (microamps) from a higher reference.

Cascode mirror: Stacks a second pair of transistors on top of the basic mirror, one in the reference leg and one in the output leg. This creates the highest output impedance of any common topology and minimizes current-copying error caused by Vce differences. The penalty is reduced output voltage headroom, since the output node must stay above two Vce drops rather than one.

MOSFET Current Mirrors

MOSFET current mirrors operate on the same principle but use gate-source voltage (Vgs) instead of Vbe to set the operating point. In a basic MOSFET mirror, both transistors share the same gate voltage and the current ratio is set by the width-to-length (W/L) ratio of the output device relative to the reference device. This makes MOSFET mirrors very convenient for integrated circuit design, where lithographic control of W and L is precise.

A cascode MOSFET mirror adds a second tier of transistors, dramatically increasing output impedance, though at the cost of requiring a higher minimum output voltage. The wide-swing cascode mirror (also called the regulated cascode) uses a bias circuit to reduce the minimum output voltage swing, preserving the high output impedance benefit while allowing the output node to swing closer to ground. This topology is widely used in precision CMOS operational amplifiers and data converters.

One important limitation in CMOS mirrors is threshold voltage mismatch (Delta Vth). Because Vth varies randomly across a wafer due to doping fluctuations, the output current can deviate from the desired ratio even when the transistors are the same size. This mismatch is proportional to 1/sqrt(W x L), so larger devices match better at the cost of silicon area. This is why precision CMOS mirrors use large transistors and careful layout rather than minimum-size devices.

Current Mirrors in Analog IC Design

Current mirrors appear throughout analog integrated circuits wherever a stable, predictable current is needed. Understanding their role in common building blocks helps make sense of how complex analog circuits function.

Differential pair biasing: Nearly every differential amplifier uses a current mirror as a tail-current source to set the common-mode operating point. The mirror maintains a constant total tail current regardless of input voltage, which stabilizes the operating point and common-mode rejection ratio.

DAC current steering: High-speed digital-to-analog converters use banks of binary-weighted current mirrors. The LSB cell carries a reference current, and each successive bit cell carries twice as much, implemented by doubling the W/L ratio. The digital input word switches the appropriate cells to the output, summing currents to produce the analog output. Current-steering DACs can switch at multi-gigahertz rates because they never fully switch off the transistors.

Operational transconductance amplifier (OTA): In a basic OTA, a current mirror serves as the active load for the differential input pair. Because both the positive and negative input signals are converted to current by the differential pair, and the mirror adds the two currents rather than subtracting them, the effective transconductance (Gm) is doubled compared to a resistive load. This is why CMOS op-amps routinely use current mirrors as loads.

Bandgap Reference

The bandgap voltage reference is one of the most important applications of a deliberately mismatched current mirror. A pair of BJTs with different emitter areas, forced to carry equal currents by a current mirror, develops a voltage difference (Delta Vbe) that is proportional to absolute temperature (PTAT). This PTAT voltage, amplified by a resistor ratio and added to a complementary-to-absolute-temperature (CTAT) voltage from a single Vbe, produces a temperature-independent reference of approximately 1.25 V. This is the silicon bandgap voltage, and the circuit is used in essentially every precision voltage reference, LDO regulator, and ADC reference on the market. The current mirror ensures both transistors carry matched currents despite their different Vbe values, making the temperature compensation work correctly.

Layout Considerations

Current mirror accuracy in integrated circuits depends critically on physical layout. Common-centroid layout arranges matched transistors symmetrically around a center point so that linear gradients in process parameters (oxide thickness, doping density) affect both devices equally and cancel in the ratio. For example, four transistors in a 2x2 grid with ABBA or ABAB interleaving achieves first-order gradient cancellation. Dummy devices at the edges of the array ensure that the active transistors all see the same neighborhood etch and implant conditions, eliminating edge effects that would cause the outermost device to differ from interior devices. These techniques are standard practice in precision current mirrors for bandgap references and DAC cells.

Error Sources and Accuracy

Understanding the main error mechanisms in current mirrors allows designers to choose the right topology and size for a given accuracy requirement.

Base current error in BJT mirrors: In a simple BJT current mirror, the base currents of both transistors must come from the reference leg. If the transistor current gain (beta) is finite, the base currents reduce the collector current of the reference transistor and introduce a systematic error of approximately 2/beta in the output-to-reference ratio. For beta = 100, this is a 2% error. The Wilson mirror reduces this to roughly 2/beta-squared, which is negligible for typical beta values.

Channel-length modulation in MOSFET mirrors: Just as BJTs have the Early effect, MOSFETs have channel-length modulation described by the parameter lambda. When the output transistor's drain voltage differs from the diode-connected reference transistor, the output current differs from the expected ratio by a factor of approximately (1 + lambda x Vds). Using longer channel lengths reduces lambda, which is why precision CMOS mirrors use transistors with L = 1-10 µm rather than minimum-length devices.

Threshold mismatch Delta Vth in CMOS: Random variation in Vth produces a current mismatch that dominates over other errors in short-channel CMOS processes. Since the current depends exponentially on Vgs-Vth in subthreshold and quadratically above threshold, even small Vth mismatches translate to significant current errors. Increasing W x L reduces mismatch by averaging over a larger gate area, following the Pelgrom model where sigma(Delta Vth) is proportional to 1/sqrt(W x L).

Trimming and Calibration

When process variation alone cannot achieve the required current accuracy, trimming provides a correction path. Laser trimming of thin-film resistors in the reference leg adjusts the reference current after wafer fabrication. Trim DACs use a small digital-to-analog converter to add or subtract a correction current; the trim code is stored in on-chip SRAM or non-volatile memory. Factory one-time programmable (OTP) trim bits, written using poly fuse or anti-fuse cells, permanently store a calibration value that is loaded at power-up. This approach is used in precision voltage references, temperature sensors, and current-output DACs where initial accuracy requirements exceed what process matching alone can deliver.

Temperature Effects

Temperature has a direct effect on current mirror accuracy. The BJT Vbe decreases by approximately 2 mV per degree Celsius, so a simple diode-connected reference will generate less current at higher temperatures unless the reference resistor compensates for this. MOSFET Vgs also decreases with temperature, though the coefficient depends on the bias point and process. PTAT (proportional to absolute temperature) circuit design deliberately exploits this temperature dependence: by forcing a known Delta Vbe across a resistor, a current that increases linearly with temperature is generated and can be used to compensate temperature drift in other circuit blocks, as in the bandgap reference described above.

Frequently Asked Questions

Why does the copied current not exactly equal the reference current?

Several mechanisms cause the output current to deviate from the ideal mirror ratio. The most common are Vce mismatch (the output transistor operates at a different collector voltage than the reference transistor, so the Early effect shifts its current), base current loading (in BJTs, the base currents drawn from the reference node reduce the available reference current), and transistor mismatches (manufacturing variation in device geometry and doping). For precision applications, use a Wilson mirror or cascode mirror topology to suppress Vce sensitivity and base-current errors. For CMOS, use large-area transistors to minimize threshold mismatch and add cascode devices to improve output impedance.

Can I use a current mirror for AC signals?

Yes, current mirrors work for AC signals within their bandwidth. The bandwidth is limited by the transistor's transition frequency (fT) and by parasitic capacitances at the mirror nodes. The diode-connected reference transistor has significant input capacitance that, combined with any input source resistance, creates a low-pass pole. The Miller effect at the cascode node can also limit bandwidth in high-gain topologies. For wideband applications, choose high-fT transistors, minimize parasitic capacitances, and consider whether a simpler topology with lower output impedance might give better frequency response despite its lower DC accuracy.